index - Equipe Secure and Safe Hardware Accéder directement au contenu

 

Dernières publications

Mots clés

Differential Power Analysis DPA Internet of Things DRAM Steadiness STT-MRAM Side-Channel Analysis SCA Coq Magnetic tunneling MRAM Side-Channel Attacks Neural networks Side-channel attacks SCA Security services Sensors CPA Elliptic curve cryptography Side-channel analysis Transistors Application-specific VLSI designs OCaml Tunneling magnetoresistance Confusion coefficient Power demand Hardware Intrusion detection Circuit faults SCA Magnetic tunnel junction Fault injection Side-channel attacks Information leakage Security and privacy Reliability Countermeasures Randomness GSM Authentication Power-constant logic PUF Field Programmable Gates Array FPGA TRNG Writing Resistance Fault injection attack Sécurité Side-channel attack Variance-based Power Attack VPA Defect modeling Electromagnetic RSA Aging Temperature sensors Training 3G mobile communication Dual-rail with Precharge Logic DPL Machine learning Protocols Reverse engineering Asynchronous Image processing Simulation Spin transfer torque Security SoC FDSOI CRT Dynamic range Robustness Hardware security Lightweight cryptography Reverse-engineering Masking Energy consumption Signal processing algorithms Linearity Countermeasure Mutual Information Analysis MIA Routing Voltage Filtering Formal methods Cryptography Receivers Random access memory Masking countermeasure FPGA Loop PUF Logic gates Process variation Side-Channel Analysis Convolution Switches Differential power analysis DPA AES Field programmable gate arrays ASIC Formal proof Costs Estimation Computational modeling

 

Documents avec texte intégral

213

Références bibliographiques

428

Open access

39 %

Collaborations