Electronic components are continuously getting smaller and embedding more and more powered functions which exacerbate the temperature rise in component/board interconnect areas. For still air conditions, the heat spreading of the component power is mainly done through the surrounding metallic planes of its electronic board. Their design optimization is henceforth mandatory to control the temperature and to preserve component reliability. To allow the electronic designer to early analyze the limits of the power dissipation of miniaturized devices, an analytical model of a multi-layered electronic board was established with the purpose to assess the validity of conventional board modeling approach. For decades, numerous authors have been promoting a homogenous single layer model that summed up the layers of the board using effective orthotropic thermal properties. The derived compact model depends on thermal properties approximation which is commonly based on parallel conduction model given a linear rule of mixture. The work presents the thermal behavior comparison of a detailed multi-layer representation to its deducted compact model for an extensive set of variable parameters, such as heat transfer coefficients, effective thermal conductivities calculation models, number of trace layers, trace coverage or source size. The results highlight the fact that the conventional practices for PCB modeling can dramatically underestimate source temperatures when their size is getting very small.